자료유형  

 학위논문

Control Number  

0017164795

International Standard Book Number  

9798346810261

Dewey Decimal Classification Number  

621.3

Main Entry-Personal Name  

Chien, Hao-Yu.

Publication, Distribution, etc. (Imprint  

[S.l.] : University of California, Los Angeles., 2024

Publication, Distribution, etc. (Imprint  

Ann Arbor : ProQuest Dissertations & Theses, 2024

Physical Description  

112 p.

General Note  

Source: Dissertations Abstracts International, Volume: 86-06, Section: B.

General Note  

Advisor: Yang, Chih-Kong Ken;Chang, Mau-Chung Frank.

Dissertation Note  

Thesis (Ph.D.)--University of California, Los Angeles, 2024.

Summary, Etc.  

요약As communication systems evolve to accommodate higher carrier frequencies and broader operating ranges, frequency dividers (FDs) in millimeter-wave circuits have become increasingly critical. They are essential for supporting multiband operation and frequency hopping technologies, particularly in applications that extend up to the low terahertz (THz) range.Frequency dividers (FDs) also serve as crucial components that connect the characteristics of the transistor level to the overall performance metrics of the circuit. Traditional figure-of-merit (FoM) assessments often emphasize intrinsic transistor properties. However, incorporating back-end-of-line (BEOL) metal parasitics is essential for accurate performance evaluations.Divider architectures can be categorized based on their operating range. For high frequency applications, dynamic or injection-locked (IL) dividers are favored for their low parasitic capacitance, simplicity, and efficiency. However, they suffer from a constrained dividing range. On the other hand, current-mode logic (CML) dividers, known for their robustness within the 1/3 to 1/2 ft region, offer a wider dividing range, but come with the drawback of significant DC power consumption. Techniques such as higher-order or distributed loads, multicore coupling, inductive peaking, and emitter follower insertion (EF) have been proposed to extend their dividing range.This research introduces a novel bandwidth extension approach using 45n m PDSOI BiCMOS technology to design static CML dividers. The methodology takes advantage of the complementary strengths of the CMOS and HBT devices to enhance the dividing performance. Mainstream SiGe BiCMOS technologies often face limitations when integrated with older CMOS processes. In contrast, this technology integrates advanced CMOS switches with high-speed HBT devices, significantly extending the dividing range and demonstrating the potential for efficient system-on-chip (SoC) designs suitable for high-speed RF front ends and multiband operations.Our results show that a conventional static CML divider can achieve a nearly 40% bandwidth increase using a PMOS resistor bank. The design operates with a maximum dividing frequency of 185 GHz and a minimum input frequency of 15 GHz, achieving a wide operating range that surpasses traditional static CML dividers while maintaining similar power efficiency to dynamic dividers. These findings position our approach as a promising solution for enhancing performance and flexibility in frequency divider design.

Subject Added Entry-Topical Term  

Electrical engineering.

Subject Added Entry-Topical Term  

Engineering.

Subject Added Entry-Topical Term  

Condensed matter physics.

Index Term-Uncontrolled  

Current-mode logic

Index Term-Uncontrolled  

Frequency dividers

Index Term-Uncontrolled  

Millimeter-wave circuits

Index Term-Uncontrolled  

Heterojunction bipolar transistors

Index Term-Uncontrolled  

Silicon-on-insulator

Added Entry-Corporate Name  

University of California, Los Angeles Electrical and Computer Engineering 0333

Host Item Entry  

Dissertations Abstracts International. 86-06B.

Electronic Location and Access  

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Control Number  

joongbu:656297