자료유형  

 학위논문

Control Number  

0016931869

International Standard Book Number  

9798380620130

Dewey Decimal Classification Number  

004

Main Entry-Personal Name  

Huang, Qijing.

Publication, Distribution, etc. (Imprint  

[S.l.] : University of California, Berkeley., 2021

Publication, Distribution, etc. (Imprint  

Ann Arbor : ProQuest Dissertations & Theses, 2021

Physical Description  

1 online resource(160 p.)

General Note  

Source: Dissertations Abstracts International, Volume: 85-04, Section: B.

General Note  

Advisor: Wawrzynek, John.

Dissertation Note  

Thesis (Ph.D.)--University of California, Berkeley, 2021.

Restrictions on Access Note  

This item must not be sold to any third party vendors.

Summary, Etc.  

요약For decades, ever-increasing computing power has been a driving force behind many technology revolutions, including the recent advances in artificial intelligence. However, due to the slowing of integrated circuit process scaling, for system architects to continue to satisfy the ever-growing compute appetite of today's applications, they must now resort to employing heterogeneous systems with specialized accelerators.Building these accelerator systems, though, is extremely expensive and time-consuming. First, the development cycle for hardware is notoriously long, making it difficult to keep up with the rapid progress in algorithms. Meanwhile, existing compilers are incapable of navigating the intractable mapping space exposed by the novel accelerator architectures. Lastly, algorithms are often designed without hardware efficiency as a key metric, and therefore, pose extra challenges in designing efficient hardware.This thesis tackles the significant challenges in jointly designing and optimizing algorithms, scheduling, and hardware designs for acceleration. We aim to advance the state-of-the-art through a three-pronged approach: the development of methodologies and tools that automatically generate accelerator systems from high-level abstractions, shortening the hardware development cycle; the adaptation of machine learning and other optimization techniques to improve accelerator design and compilation flows; and the co-design of algorithms and accelerators to exploit more optimization opportunities.The target application domain of this thesis is deep learning which has achieved unprecedented success in a wide range of tasks such as computer vision, neural language processing, etc. As intelligent devices prevail, deep learning is foreseeably becoming a major computation demand in our everyday life. Therefore, by performing end-to-end system optimization with hardware acceleration, the dissertation aims to unleash the ubiquitous adoption of cutting-edge deep learning algorithms to transform various aspects of life.

Subject Added Entry-Topical Term  

Computer science.

Subject Added Entry-Topical Term  

Computer engineering.

Subject Added Entry-Topical Term  

Electrical engineering.

Index Term-Uncontrolled  

Accelerators

Index Term-Uncontrolled  

Co-design

Index Term-Uncontrolled  

Deep learning

Index Term-Uncontrolled  

Machine learning

Index Term-Uncontrolled  

Hardware acceleration

Added Entry-Corporate Name  

University of California, Berkeley Computer Science

Host Item Entry  

Dissertations Abstracts International. 85-04B.

Host Item Entry  

Dissertation Abstract International

Electronic Location and Access  

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Control Number  

joongbu:639736